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 R
EM MICROELECTRONIC-MARIN SA
V6301
Ultra Low Power 3-Pin Voltage Surveillance with Time-out
Features
n Clear microprocessor restart after power up n Processor reset at power down n Reset output guaranteed down to VDD = 1 V n Low power consumption: typ. 3 mA at VDD = 5 V n n n n n n n
O - 40 to +85 C temperature range O On request extended temperature range, -40 to +125 C On-chip oscillator No external components required Push-pull or Open drain output TO-92, SOT-23 5L packages Pin compatible with DS 1233 A in TO-92
Typical Operating Configuration
VDD
VDD
VDD
RES or RES RES or RES
V6301
VSS
Microprocessor
VSS
GND
Description
The V6301 is a CMOS device which monitors the supply voltage of any electronic system, and generates the appropriate Reset signal. The thres hold defines the minimum allowed voltage which guarantees the good functionality of the system. As long as VDD stays upside this voltage level, the output stays inactive. If VDD drops below VTH, the output gets active. When V DD rises above VTH, the output remains active for an additional 290 ms (typ.). This al lows the system to stabilize before getting fully active. The threshold v oltage may be obtained in differ ent versions: 2.0 V, 2.4 V, 2.8 V, 3.5 V, 4.0 V, 4.5 V.
For Open drain version:
Fig. 1
Pin Assignment
TO-92
View Flat Front
V6301
1 2 3
Applications
All microprocessor applications where an automatic restart is required: n n n n n n Computer electronics White / Brown goods Automotive electronics Industrial electronics Telecom systems Hand-held systems VDD RES VSS or RES
SOT-23 5L
NC VSS NC
3
2
1
V6301
4 5
RES or RES
VDD Fig. 2
1
R
V6301
Absolute Maximum Ratings
Parameter Voltage at VDD to VSS Min. voltage at RES or RES Max. voltage at RES or RES Storage temperature range Symbol VDD Vmin Vmax TSTO Conditions -0.3V to+10 V VSS - 0.3 V VDD + 0.3 V -65O to +150 OC Table 1 Stresses above these listed maximum ratings may cause permanent damage to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction.
Handling Procedures
This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the supply voltage range.
Operating Conditions
Parameter Operating temperature Positive supply voltage
1) 1)
Symbol Min. TA VDD -40 1
Typ . Max. Units +125 8
O
C V
Table 2 The maximum operating temperature is confirmed by sampling at initial device qualification.
Electrical Characteristics
TA = -40 to +85 OC, unless otherwise specified Parameter Supply current
1)
Symbol IDD IDD IDD VTH VTH VTH VTH VTH VTH VHYS VOL VOL VOL VOH VOH VOH ILEAK
Test Conditions VDD = 2 V VDD = 5 V VDD = 8 V Version: A,G,M Version: B,H,N Version: C,I,O Version: D,J,P Version: E,K,Q Version: F,L,R VDD = 5 V, IOL = 8 mA VDD = 3 V, IOL = 4 mA VDD = 1 V, IOL = 50 mA VDD = 5 V, IOH = -8 mA VDD = 3 V, IOH = -4 mA VDD = 1 V, IOH = -100 mA VDD = 8 V
Min.
Min. at 25 oC
Typ. 1.5 3.0 5.2 1.95 2.32 2.73 3.42 3.88 4.42 25 175 140 20 4.5 2.6 950 0.05
Max. at 25 oC 2.1 3.9 6.8 2.04 2.41 2.86 3.59 4.08 4.67
Max. 3.1 5.7 10.0 2.17 2.55 3.03 3.80 4.32 4.95 400 300 90
Units mA mA mA V V V V V V mV mV mV mV V V mV mA Table 3
Threshold voltage
1.77 2.09 2.48 3.11 3.55 4.05
1.84 2.18 2.59 3.23 3.70 4.22
Threshold hysteresis RES Output Low Level
RES Output High Level
4.3 2.3 850
Output leakage current
1) 2)
2)
1
RES or RES open Only for Open drain versions
Timing Characteristics
VDD = 5.0 V, TA = -40 to +85OC, unless otherwise specified
Parameter
Power on reset time 3) Sensitivity 3) Reaction time
3)
Symbol
tPOR tSEN tR
Test Conditions
for VDD = 5 V to 3 V in 5 ms for VDD = 5 V to 3 V in 5 ms
Min. 140 20 22
Typ. 290 0.8 tR 75
Max. 560 150
Units ms ms ms Table 4
Tested on versions with VTH higher than 3 V
2
R
V6301
Timing Waveforms
VDD VTH tSEN
1V tPOR tR tPOR t RES t Logic "1" RES Logic "0" t Fig.3
Logic "1" Logic "0"
Block Diagram
VDD
Voltage Reference
+
Reset Logic Timer
RES or RES
Oscillator Vss Fig.4
Pin Description
TO-92 Pin
1 2 3
SOT-23 5L Name
VDD RES or RES VSS
Function
Positive Supply Reset output Supply ground Table 5
Pin
1 2 3 4 5
Name
NC VSS NC RES or RES VDD
Function
No connection Supply ground No connection Reset output Positive supply Table 6
3
R
V6301
Ordering Information
The V6301 is available with Push-pull or Open output stage and Reset active low or high. Ordering form: V6301 < packaging> Example: Smart reset with: - Reset active low - Open drain output - 2.8 V threshold - TO-92 package Chip form and SOT-223 on request Non-stock items, minimum order 30 K pieces.
Version letter definition
Output stage 2.0 Threshold Voltage [V] 2.4 2.8 3.5 4.0 4.5
1)
Push-pull, Reset active low AB 1) Push-pull, Reset active high G H 1) 1) Open drain, Reset active low M N
C I O
D J P
E 1) K 1) Q
F L R
Table 7
1)
V6301 O TO-92
When ordering, please specify the complete part number.
EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to change the circuitry and specifications without notice at any time. You are strongly urged to ensure that the information given has not been superseded by a more up-to-date
O 2000 EM Microelectronic-Marin SA,10/00, Rev. B/316
4


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